Publications: Conferences, Journals, and Patents

Towards a Complete Methodology for Synthesizing Bundled-Data Asynchronous Circuits on FPGAs
Kshitij Bhardwaj, Paolo Mantovani, Luca Carloni, and Steven M. Nowick
Accepted to appear in ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED 2019), Lausanne, Switzerland
Global and Local Time-Step Determination Schemes For Neural Networks
Gregory K. Chen, Kshitij Bhardwaj, Raghavan Kumar, Huseyin E. Sumbul, Phil Knag, Ram K. Krishnamurthy, Himanshu Kaul
US Patent Application: 2019/0102669, Patent Application Publication Date: April 4, 2019. [pdf]
Determining Optimal Coherency Interface for Many-Accelerator SoCs Using Bayesian Optimization
Kshitij Bhardwaj, Marton Havasi, Yuan Yao, David M. Brooks, Jose Miguel Hernandez Lobato, and Gu-Yeon Wei
Accepted to appear in IEEE Computer Architecture Letters (CAL 2019)
A Continuous-Time Replication Strategy for Efficient Multicast in Asynchronous NoCs
Kshitij Bhardwaj and Steven M. Nowick
In IEEE Transactions on Very Large Scale Integration Systems (TVLSI 2019), pp. 350-363 [pdf]
Achieving Lightweight Multicast in Asynchronous NoCs Using a Continuous-Time Multi-Way Read Buffer
Kshitij Bhardwaj, Weiwei Jiang and Steven M. Nowick
Proceedings of International Symposium on Networks-on-Chip (NOCS 2017), Seoul, South Korea, pp. 1-8
(Best paper nomination) [pdf]
Achieving Lightweight Multicast in Asynchronous Networks-on-Chip Using Local Speculation
Kshitij Bhardwaj and Steven M. Nowick
Proceedings of Design Automation Conference (DAC 2016), Austin, TX, pp. 38:1-38:6
[pdf]
A Lightweight Early Arbitration Method for Low-Latency Asynchronous 2D-Mesh NoC's
Weiwei Jiang, Kshitij Bhardwaj, Geoffray Lacourba and Steven M. Nowick
Proceedings of Design Automation Conference (DAC 2015), San Francisco, CA, pp. 203:1-203:6
[pdf]
Aging-Aware Routing for NoCs
Kshitij Bhardwaj, Koushik Chakraborty and Sanghamitra Roy
US Patent: 9344358, Date of Patent: May 17, 2016 [pdf]
Wearout Resilience in NoCs Through An Aging Aware Routing Algorithm
Dean Ancajas, Kshitij Bhardwaj, Koushik Chakraborty and Sanghamitra Roy
IEEE Transactions on Very Large Scale Integration Systems (TVLSI 2015), vol.23, no.2, pp. 382-391
[pdf]
Towards Graceful Aging Degradation in NoCs Through Adaptive Routing Algorithm
Kshitij Bhardwaj, Koushik Chakraborty and Sanghamitra Roy
Proceedings of Design Automation Conference (DAC 2012), San Francisco, CA, pp. 382-391
[pdf]
An MILP-Based Aging Aware Routing Algorithm for NoCs
Kshitij Bhardwaj, Koushik Chakraborty and Sanghamitra Roy
Proceedings of Design, Automation & Test in Europe (DATE 2012), Dresden, Germany, pp. 326-341
[pdf]
Power-Performance Yield Optimization for MPSoCs Using MILP
Kshitij Bhardwaj, Sanghamitra Roy and Koushik Chakraborty
Proceedings of International Symposium on Quality Electronic Design (ISQED 2012), Santa Clara, CA, pp. 764-771
[pdf]
Energy and Bandwidth Aware Mapping of IPs onto Regular NoC Architectures Using Multi-Objective Genetic Algorithms
Kshitij Bhardwaj and Rabindra K. Jena
Proceedings of International Symposium on System-on-Chip (ISSoC 2009), Tampere, Finland, pp. 27-31
[pdf]
1.5V High Performance OP AMP Using Self Cascode Structure
Kshitij Bhardwaj and S.S. Rajput
Proceedings of IEEE Student Conference on Research and Development (SCOReD 2009), UPM Serdang, pp. 254-257
[pdf]

© 2016 by Kshitij Bhardwaj. Proudly created with Wix.com

  • Facebook - Grey Circle
  • Twitter - Grey Circle
  • Google+ - Grey Circle
  • LinkedIn - Grey Circle